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CrySystem/CPUDetect.h
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163
CrySystem/CPUDetect.h
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/*=============================================================================
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CPUDetect.cpp : CPU detection.
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Copyright 2001 Crytek Studios. All Rights Reserved.
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Revision history:
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* Created by Honitch Andrey
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=============================================================================*/
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#ifndef __CPUDETECT_H__
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#define __CPUDETECT_H__
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//-------------------------------------------------------
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/// Cpu class
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//-------------------------------------------------------
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#define MAX_CPU 32
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/// Cpu Features
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#define CFI_FPUEMULATION 1
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#define CFI_MMX 2
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#define CFI_3DNOW 4
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#define CFI_SSE 8
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#define CFI_SSE2 0x10
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/// Type of Cpu Vendor.
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enum ECpuVendor
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{
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eCVendor_Unknown,
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eCVendor_Intel,
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eCVendor_Cyrix,
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eCVendor_AMD,
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eCVendor_Centaur,
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eCVendor_NexGen,
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eCVendor_UMC,
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eCVendor_M68K
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};
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/// Type of Cpu Model.
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enum ECpuModel
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{
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eCpu_Unknown,
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eCpu_8086,
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eCpu_80286,
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eCpu_80386,
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eCpu_80486,
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eCpu_Pentium,
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eCpu_PentiumPro,
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eCpu_Pentium2,
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eCpu_Pentium3,
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eCpu_Pentium4,
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eCpu_Pentium2Xeon,
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eCpu_Pentium3Xeon,
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eCpu_Celeron,
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eCpu_CeleronA,
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eCpu_Am5x86,
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eCpu_AmK5,
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eCpu_AmK6,
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eCpu_AmK6_2,
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eCpu_AmK6_3,
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eCpu_AmK6_3D,
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eCpu_AmAthlon,
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eCpu_AmDuron,
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eCpu_CyrixMediaGX,
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eCpu_Cyrix6x86,
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eCpu_CyrixGXm,
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eCpu_Cyrix6x86MX,
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eCpu_CenWinChip,
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eCpu_CenWinChip2,
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};
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struct SCpu
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{
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ECpuVendor meVendor;
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ECpuModel meModel;
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unsigned long mFeatures;
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bool mbSerialPresent;
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char mSerialNumber[30];
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int mFamily;
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int mModel;
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int mStepping;
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char mVendor[64];
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char mCpuType[64];
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char mFpuType[64];
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int mSpeed;
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double m_SecondsPerCycle;
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};
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class CCpuFeatures
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{
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private:
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int m_NumSystemProcessors;
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int m_NumAvailProcessors;
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bool m_bOS_ISSE;
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bool m_bOS_ISSE_EXCEPTIONS;
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public:
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SCpu m_Cpu[MAX_CPU];
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public:
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CCpuFeatures()
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{
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m_NumSystemProcessors = 0;
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m_NumAvailProcessors = 0;
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m_bOS_ISSE = 0;
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m_bOS_ISSE_EXCEPTIONS = 0;
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}
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void Detect(void);
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bool hasSSE() { return (m_Cpu[0].mFeatures & CFI_SSE) != 0; }
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bool hasSSE2() { return (m_Cpu[0].mFeatures & CFI_SSE2) != 0; }
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bool has3DNow() { return (m_Cpu[0].mFeatures & CFI_3DNOW) != 0; }
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bool hasMMX() { return (m_Cpu[0].mFeatures & CFI_MMX) != 0; }
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};
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#if defined(WIN64) || defined(LINUX64)
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inline bool IsAMD64()
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{
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#ifdef _AMD64_
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return true;
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#else
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#error not supported here
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#endif
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}
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#else
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inline bool
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IsAMD64()
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{
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#if defined(LINUX32)
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return false;
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#else
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_asm
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{
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// make sure cpuid is available
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pushfd // save EFLAGS
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pop eax // store EFLAGS in EAX
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mov ebx, eax // save in EBX for later testing
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xor eax, 00200000h // toggle bit 21
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push eax // push to stack
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popfd // save changed EAX to EFLAGS
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pushfd // push EFLAGS to TOS
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pop eax // store EFLAGS in EAX
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cmp eax, ebx // see if bit 21 has changed
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mov eax, 0 // clear eax to return "false"
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jz QUIT // if no change, no CPUID
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// perform AMD64 detection
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mov eax, 0x80000001 // load argument "Processor Signature and AMD Features" to call cpuid
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cpuid // call cpuid
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mov eax, edx // edx contains "AMD Feature Support" flags
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shr eax, 29 // test bit 29 (support for "Long Mode")
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and eax, 0x00000001 // mask out bit for proper return value
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QUIT:
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}
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#endif
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}
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#endif // WIN32
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#endif
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